C++
Bytecode Virtual Machine
• Built a complete C++ stack-based VM with lexer, parser, and AST components following x86 ISA
for bytecode
compilation and execution.
• Implemented robust control-flow support with conditional statements, loops, and jump
instructions enabling
complex program execution patterns.
• Enhanced instruction dispatch and validated via REPL testing, achieving 20% performance
improvement.
C++
L1/L2 Cache Simulator
• Analyzed a two-level CPU cache simulator in C++ using STL, with customizable parameters such
as size,
associativity, and block size.
• Integrated set-associative caching with FIFO replacement policy and hex trace file parsing for
workload
accuracy.
• Evaluated performance evaluation by calculating AMAT and generated comprehensive hit/miss
statistics for
analysis.
Verilog
Real-Time Image Processing on FPGA
• Developed multiple image processing modules in Verilog including grayscale conversion, median
filtering,
and Sobel edge detection algorithms.
• Executed and tested hardware implementation on Spartan-3 FPGA platform for real-world image
processing
applications.
• Optimized performance in Xilinx ISE using hardware parallelism for real-time execution
capabilities.
STM32
Industrial Protection System
• Engineered an STM32-based industrial protection system integrating temperature, ultrasonic,
and light
sensors for continuous environmental monitoring.
• Designed embedded C firmware in Keil MDK with ADC signal processing, multi-sensor data fusion,
and
real-time anomaly detection algorithms.
• Established automated safety responses and alert systems for reliable hazard detection and
workplace
protection.
